The present invention relates to a drive circuit for an insulated gate device, and in particular to a drive circuit which is suitable for applying to a method for reducing loss of a drive circuit for an insulated gate device, and for reducing temperature dependency of noise due to an insulated gate device.
In a semiconductor power converter, insulated gate power devices such as an insulated gate bipolar transistor (IGBT), a power MOSFET and the like are used, and there is a method in which a drive circuit for driving these insulated gate power devices is made using an inverter configuration. FIG. 5 is a view showing the circuit configuration of a drive circuit of a conventional insulated gate device.
In FIG. 5, a P channel field effect transistor (hereinafter referred to as P-FET) 41 and an N channel field effect transistor (hereinafter referred to as N-FET) 42 are connected in series, and a source of the P-FET 41 is connected to a power supply voltage Vcc and a source of the N-FET 42 is connected to the ground potential. Drains of the P-FET 41 and the N-FET 42 are commonly connected to a gate of an IGBT 43 and a driving signal is commonly input into gates of the P-FET 41 and the N-FET 42.
When the IGBT 43 is turned on, the P-FET 41 is turned on by making the driving signal go to a low level, and at the same time the N-FET 42 is turned off. The power supply voltage Vcc is applied to the gate of the IGBT 43 via the P-FET 41. On the other hand, when the IGBT 43 is turned off, the P-FET 41 is turned off by making the driving signal go to a high level, and at the same time the N-FET 42 is turned on. The ground potential is applied to the gate of the IGBT 43 via the N-FET 42.
Here, on-resistance of the P-FET 41 and on-resistance of the N-FET 42 are used when the IGBT 43 is driven at the time of turn-on and at the time of turn-off respectively. In addition, for example, Japanese Patent Laid-Open No. 2005-354586, of which the corresponding foreign patent application is United States Patent Publication No. US2005/0280440A1, discloses that a pre-driver circuit includes a current mirror circuit which has a pair of transistors that are connected to a pre-driver power supply voltage, a level shifter circuit which is connected to a first transistor via a self-bias circuit and a discharge transistor which is connected to a second transistor, so that the pre-driver circuit is capable of reducing the size of a drive transistor while preventing a drive transistor's gate from being destroyed, thereby reducing power consumption.
However, in an intelligent power module (IPM), the insulated gate power device such as the IGBT 43 and the drive circuit are equipped in the same module. In addition, when the insulated gate power device and the drive circuit are equipped in the same module, the drive circuit which is near the insulated gate power device is put under a severe thermal environment because the operating temperature of the insulated gate power device is guaranteed to a maximum of 150° C.
Because on-resistance of the P-FET 41 and on-resistance of the N-FET 42 increase in a high temperature condition in comparison with room temperature condition, in the method in which the IGBT 43 is driven by using on-resistance of the P-FET 41 and on-resistance of the N-FET 42, the charging velocity of the gate of the IGBT 43 becomes late in the high temperature condition in comparison with the room temperature condition, and steep voltage variation (voltage between a collector and an emitter of the IGBT 43) is suppressed, so that generation of noise due to voltage variation decreases. However, there is a problem in that loss increases so that a time needed for the turn-on of the IGBT 43 increases. On the other hand, when the design is optimized for the high temperature condition in order to cause as little lose as possible, the charging velocity of the gate of the IGBT 43 is too fast at room temperature, and the voltage variation becomes steep, so that there is a problem that noise increases.